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 Data Sheet No. PD60195-D
IR2010(S) & (PbF)
Features
* * * * * * * *
HIGH AND LOW SIDE DRIVER
Product Summary
VOFFSET IO+/VOUT ton/off Delay Matching 200V max. 3.0A / 3.0A typ. 10 - 20V 95 & 65 ns typ. 15 ns max.
* Floating channel designed for bootstrap operation
Fully operational to 200V Tolerant to negative transient voltage, dV/dt immune Gate drive supply range from 10 to 20V Undervoltage lockout for both channels 3.3V logic compatible Separate logic supply range from 3.3V to 20V Logic and power ground 5V offset CMOS Schmitt-triggered inputs with pull-down Shut down input turns off both channels Matched propagation delay for both channels Outputs in phase with inputs Also available LEAD-FREE
Applications
* Audio Class D amplifiers * High power DC-DC SMPS converters * Other high frequency applications
Packages
Description
The IR2010 is a high power, high voltage, high speed power MOSFET and IGBT drivers with independent high and low side referenced output channels, ideal for Audio Class D and DC-DC converter applications. Logic inputs are compatible with standard CMOS or LSTTL output, down to 3.0V logic. The output drivers feature a high pulse current buffer stage designed for minimum driver cross-conduction. Propagation delays are matched to simplify use in high frequency applications. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high side configuration which operates up to 200 volts. Proprietary HVIC and latch immune CMOS technologies enable ruggedized monolithic construction.
14-Lead PDIP
16-Lead SOIC
Typical Connection
HO VDD HIN SD LIN V SS VCC VDD HIN SD LIN VSS VCC COM LO VB VS
200V
TO LOAD
(Refer to Lead Assignments for correct configuration). This/These diagram(s) show electrical connections only. Please refer to our Application Notes and DesignTips for proper circuit board layout.
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1
IR2010(S) & (PbF)
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions.
Symbol
VB VS VHO VCC VLO VDD VSS VIN dVs/dt PD RTHJA TJ TS TL
Definition
High side floating supply voltage High side floating supply offset voltage High side floating output voltage Low side fixed supply voltage Low side output voltage Logic supply voltage Logic supply offset voltage Logic input voltage (HIN, LIN & SD) Allowable offset supply voltage transient (figure 2) Package power dissipation @ TA +25C Thermal resistance, junction to ambient Junction temperature Storage temperature Lead temperature (soldering, 10 seconds) (14 lead DIP) (16 lead SOIC) (14 lead DIP) (16 lead SOIC)
Min.
-0.3 VB - 25 VS - 0.3 -0.3 -0.3 -0.3 VCC - 25 VSS - 0.3 -- -- -- -- -- -- -55 --
Max.
225 VB + 0.3 VB + 0.3 25 VCC + 0.3 VSS + 25 VCC + 0.3 VDD + 0.3 50 1.6 1.25 75 100 150 150 300
Units
V
V/ns W
C/W
C
Recommended Operating Conditions
The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within the recommended conditions. The VS and VSS offset ratings are tested with all supplies biased at 15V differential. Typical ratings at other bias conditions are shown in figures 24 and 25.
Symbol
VB VS VHO VCC VLO VDD VSS VIN TA
Definition
High side floating supply absolute voltage High side floating supply offset voltage High side floating output voltage Low side fixed supply voltage Low side output voltage Logic supply voltage Logic supply offset voltage Logic input voltage (HIN, LIN & SD) Ambient temperature
Min.
VS + 10 Note 1 VS 10 0 VSS + 3 -5 (Note 2) VSS -40
Max.
VS + 20 200 VB 20 VCC VSS + 20 5 VDD 125
Units
V
C
Note 1: Logic operational for VS of -4 to +200V. Logic state held for VS of -4V to -VBS. Note 2: When VDD < 5V, the minimum VSS offset is limited to -VDD. (Please refer to the Design Tip DT97-3 for more details).
2
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IR2010(S) & (PbF)
Dynamic Electrical Characteristics
VBIAS (VCC, VBS, VDD) = 15V, CL = 1000 pF, TA = 25C and VSS = COM unless otherwise specified. The dynamic electrical characteristics are measured using the test circuit shown in Figure 3.
Symbol
ton toff tsd tr tf MT
Definition
Turn-on propagation delay Turn-off propagation delay Shutdown propagation delay Turn-on rise time Turn-off fall time Delay matching, HS & LS turn-on/off
Figure Min. Typ. Max. Units Test Conditions
7 8 9 10 11 6 50 30 35 -- -- -- 95 65 70 10 15 -- 135 105 105 20 25 15 VS = 0V VS = 200V VS = 200V
ns
Static Electrical Characteristics
VBIAS (VCC, VBS, VDD) = 15V, TA = 25C and VSS = COM unless otherwise specified. The VIN, VTH and IIN parameters are referenced to VSS and are applicable to all three logic input leads: HIN, LIN and SD. The VO and IO parameters are referenced to COM and are applicable to the respective output leads: HO or LO.
Symbol
VIH VIL VIH VIL VOH VOL ILK IQBS IQCC IQDD IIN+ IINVBSUV+ VBSUVVCCUV+ VCCUVIO+ IO-
Definition
Logic "1" input voltage Logic "0" input voltage Logic "1" input voltage Logic "0" input voltage High level output voltage, VBIAS - VO Low level output voltage, VO Offset supply leakage current Quiescent VBS supply current Quiescent VCC supply current Quiescent VDD supply current Logic "1" input bias current Logic "0" input bias current VBS supply undervoltage positive going threshold VBS supply undervoltage negative going threshold VCC supply undervoltage positive going threshold VCC supply undervoltage negative going threshold Output high short circuit pulsed current Output low short circuit pulsed current
Figure Min. Typ. Max. Units Test Conditions
12 13 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 9.5 -- 2 -- -- -- -- -- -- -- -- -- 7.5 7.0 7.5 7.0 2.5 2.5 -- -- -- -- -- -- -- 70 100 1 20 -- 8.6 8.2 8.6 8.2 3.0 3.0 -- 6.0 -- 1 1.0 0.1 50 210 230 5 40 1.0 9.7 9.4 9.7 9.4 -- -- A VO = 0V, VIN = VDD PW 10 s VO = 15V, VIN = 0V PW 10 s V A V VDD = 15V VDD = 3.3V IO = 0A IO = 0A VB=VS = 200V VIN = 0V or VDD VIN = 0V or VDD VIN = 0V or VDD VIN = VDD VIN = 0V
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3
IR2010(S) & (PbF)
Functional Block Diagram
VB VDD UV DETECT LEVEL SHIFT CIRCUIT UV Q S R VS
HO
HIN
VSS /COM LEVEL SHIFT
SD UV DETECT
VCC
LIN
VSS /COM LEVEL SHIFT
LO DELAY
VSS
COM
Lead Definitions
Symbol Description
VDD HIN SD LIN VSS VB HO VS VCC LO COM Logic supply Logic input for high side gate driver output (HO), in phase Logic input for shutdown Logic input for low side gate driver output (LO), in phase Logic ground High side floating supply High side gate drive output High side floating supply return Low side supply Low side gate drive output Low side return
Lead Assignments
14 Lead PDIP
16 Lead SOIC (Wide Body)
IR2010 Part Number
4
IR2010S
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IR2010(S) & (PbF)
HV =10 to 200V
HIN LIN
SD
<50 V/ns
HO LO
Figure 1. Input/Output Timing Diagram
Figure 2. Floating Supply Voltage Transient Test Circuit
HIN LIN
(0 to 200V)
50%
50%
ton
tr 90%
toff 90%
tf
HO LO
10%
10%
Figure 3. Switching Time Test Circuit
Figure 4. Switching Time Waveform Definition
HIN LIN
50%
50%
50%
SD
tsd
LO
HO
10%
HO LO
90%
MT 90%
MT
LO
Figure 5. Shutdown Waveform Definitions
HO
Figure 6. Delay Matching Waveform Definitions
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5
IR2010(S) & (PbF)
250
250
Turn-on Time (nS)
Turn-on Time (nS)
200
m ax
200
m ax
150
150
typ
100
100
typ
50
50
0 -50
0 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (C)
VCC/VBS Supply Voltage (V)
Figure 7A. Turn-on Time vs. Temperature
300 250 200
250
Figure 7B. Turn-on Time vs. VCC/VBS Voltage
Turn-off Time (nS)
Turn-on Time (nS)
200
max
150
m ax
150 100
100
typ
50 0 0 2 4 6 8 10 12 14 16 18 20
typ
50
0 -50
-25
0
25
50
75
100
125
VDD Supply Voltage (V)
Temperature (C)
Figure 7C. Turn-on Time vs VDD Voltage
250
300
Figure 8A. Turn-off Time vs. Temperature
200
250
Turn-off Time (nS)
Turn-off Time (nS)
200
150
m ax
100
150
max
100
50
typ
50
typ
0 10 12 14 16 18 20
0 0 2 4 6 8 10 12 14 16 18 20
VCC/VBS Supply Voltage (V)
Vdd Supply Voltage (V)
Figure 8B. Turn-off Time vs. VCC/VBS Voltage
Figure 8C. Turn-off Time vs. VDD Voltage
6
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IR2010(S) & (PbF)
250
2 50
Shutdown Time (nS)
max
150
Shutdown Time (nS)
200
2 00
1 50
m ax
100
1 00
typ
50
50
typ
0 -50 -25 0 25 50 75 100 125
0 10 12 14 16 18 20
Temperature (C)
VCC/VBS Supply Voltage (V)
Figure 9A. Shutdown Time vs. Temperature
300 250
Figure 9B. Shutdown Time vs. VCC/VBSVoltage
40
Turn-on Rise Time (nS)
Shutdown Time (nS)
30
200 150 100 50 0 0 2 4 6 8 10 12 14 16 18 20
max
20
10
typ
0 -50 -25 0 25 50 75 100 125
VDD Supply Voltage (V)
Temperature (C)
Figure 9C. Shutdown Time vs VDD Voltage
40 40
Figure 10A. Turn-on Rise Time vs. Temperature
Turn-on Rise Time (nS)
S) Turn-off Fall Time (nS)
30
max
30
max
20
20
10
typ
10
typ
0 10 12 14 16 18 20
0 -50 -25 0 25 50 75 100 125
VBIAS Supply Voltage (V)
Figure 10B. Turn-on Rise Time vs. VBIAS (VCC=VBS=VDD) Voltage
Temperature (C)
Figure 11A. Turn-off Fall Time vs. Temperature
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7
IR2010(S) & (PbF)
40
15
Logic '1' Input Threshold (V)
Turn-off Fall Time (nS)
30
12
max
20
9
min
6
typ
10
3
0 10 12 14 16 18 20
0 -50 -25 0 25 50 75 100 125
VBIAS Supply Voltage (V)
Temperature (C)
Figure 11B. Turn-Off Fall Time vs. VBIAS (VCC=VBS=VDD) Voltage
15
Figure 12A. Logic "1" Input Threshold vs. Temperature
15
Logic '1' Input Threshold (V )
12
Logic '0' Input Threshold (V)
12
9
9
6
6
max
3
min
3
0 0 2 4 6 8 10 12 14 16 18 20
0 -50 -25 0 25 50 75 100 125
VDD Logic Supply Voltage (V)
Temperature (C)
Figure 12B. Logic "1" Input Threshold vs. VDD Voltage
15
Figure 13A. Logic "0" Input Threshold vs. Temperature
5
Logic '0' Input Threshold (V)
9
High Level Output (V)
12
4
3
6
2
3
max
max
1
0 0 2 4 6 8 10 12 14 16 18 20
0 -50 -25 0 25 50 75 100 125
VDD Logic Supply Voltage (V)
Temperature (C)
Figure 13B. Logic "0" Input Threshold vs. VDD Voltage
Figure 14A. High Level Output vs. Temperature
8
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IR2010(S) & (PbF)
5
1.0
High Level Output (V)
4
0.8
Low Level Output (V)
3
0.6
2
0.4
max
1
0.2
m ax
0 10 12 14 16 18 20
0.0 -50 -25 0 25 50 75 10 0 12 5
VBIAS Supply Voltage (V)
Temperature (C)
Figure 14B. High Level Output vs. VBIAS Voltage
1.0
Figure 15A. Low Level Output vs. Temperature
300
Low Level Output (V)
0.8
Offset Supply Current (uA)
200
0.6
0.4
m ax
100
0.2
max
0
0.0 10 12 14 16 18 20
-50
-25
0
25
50
75
100
125
VBIAS Supply Voltage (V)
Temperature (C)
Figure 15B. Low Level Output vs. VBIAS Voltage
100
Figure 16A. Offset Supply Current vs. Temperature
500
Offset Supply Current (uA)
VBS Supply Current (uA)
80
400
60
m ax
40
300
max
200
20
100
typ
0 0 20 40 60 80 100 120 140 160 180 200 0 -50 -25 0 25 50 75 100 125
Offset Supply Voltage (V)
Temperature (C)
Figure 16B. Offset Supply Current vs. Offset Voltage
Figure 17A. Vbs Supply Current vs. Temperature
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9
IR2010(S) & (PbF)
500
500
VBS Supply Current (uA)
VCC Supply Current (uA)
400
400
300
300
200
max
200
max
100
100
typ
0 10 12 14 16 18 20
0 -50 -25
typ
0 25 50 75 100 125
VBS Floating Supply Voltage (V)
Temperature (C)
Figure 17B. Vbs Supply Current vs. VBS Voltage
500
Figure 18A. Vcc Supply Current vs. Temperature
20
VCC Supply Current (uA)
400
VDD Supply Current (uA)
15
300
10
200
max
max
5
100
typ
0 10 12 14 16 18 20
0 -50 -25 0
typ
25 50 75 100 125
VCC Voltage (V)
Temperature (C)
Figure 18B. Vcc Supply Current vs. VCC Voltage
10
Figure 19A. Vdd Supply Current vs. Temperature
100
Logic '1' Input Current (uA)
VDD Supply Current (uA)
8
80
6
max
60
max
40
4
2
20
typ
0 2 4 6 8 10
typ
12 14 16 18 20
0 -50 -25 0 25 50 75 100 125
VDD Voltage (V)
Temperature (C)
Figure 19B. Vdd Supply Current vs. VDD Voltage
Figure 20A. Logic "1" Input Current vs. Temperature
10
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IR2010(S) & (PbF)
100
5.0
Logic '0' Input Current (uA)
Logic "1" Input Current (uA)
80
4.0
60
3.0
40
2.0
max
20
1.0
max
typ
0 2 4 6 8 10 12 14 16 18 20
0.0 -50 -25 0 25 50 75 100 125
V DD Voltage (V)
Temperature (C)
Figure 20B. Logic "1" Input Current vs. VDD Voltage
5 .0
Figure 21A. Logic "0" Input Current vs. Temperature
11.0
Logic "0" Input Current (uA)
4 .0
VBS Undervoltage Lockout + (V)
10.0
Max.
3 .0
9.0
Typ.
2 .0
8.0
Min.
m ax
1 .0
7.0
0 .0 2 4 6 8 10 12 14 16 18 20
6.0 -50 -25 0 25 50 75 100 125
VDD Voltage (V)
Temperature (C)
Figure 21B. Logic "0" Input Current vs. VDD Voltage
11.0
Figure 22. VBS Undervoltage (+) vs. Temperature
11.0
VCC Undervoltage Lockout + (V)
10.0 VBS Undervoltage Lockout - (V)
Max.
10.0
Max.
9.0
9.0
Typ.
Typ.
8.0
8.0
Min.
7.0
Min.
7.0
6.0 -50 -25 0 25 50 75 100 125 Temperature (C)
6.0 -50 -25 0 25 50 75 100 125 Temperature (C)
Figure 23. VBS Undervoltage (-) vs. Temperature
Figure 24. VCC Undervoltage (+) vs. Temperature
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11
IR2010(S) & (PbF)
11.0
5.0
Vcc Undervoltage Lockout - (V)
10.0
Max.
Output Source Current (uA)
4.0
typ
3.0
9.0
Typ.
8.0
min
2.0
7.0
Min.
1.0
6.0 -50 -25 0 25 50 75 100 125 Temperature (C)
0.0 -50 -25 0 25 50 75 10 0 12 5
Temperature (C)
Figure 25. VCC Undervoltage (-) vs. Temperature
5.0
Figure 26A. Output Source Current vs. Temperature
5.0
Output Source Current (uA)
Output Sink Current (uA)
4.0
4.0
typ
3.0
3.0
typ
2.0
2.0
min
min
1.0
1.0
0.0 10 12 14 16 18 20
0.0 -50 -25 0 25 50 75 100 125
Vbias Supply Voltage (V)
Temperature (C)
Figure 26B. Output Source Current vs. VBIAS Voltage
5.0
Figure 27A. Output Sink Current vs. Temperature
200V 1 5 0 .0 0 1 2 5 .0 0 1 0 0 .0 0 10V 7 5 .00 5 0 .00 2 5 .00 0 .0 0 100V
Output Sink Current (uA)
4.0
3.0
typ
2.0
min
1.0
0.0 10 12 14 16 18 20
Junction Temperature (C)
1.E + 0 3
1.E + 0 4 1.E + 0 5 F re q u e n cy (H z)
1.E + 0 6
Vbias Supply Voltage (V)
Figure 27B. Output Sink Current vs. VBIAS Voltage
Figure 28. IR2010 Tj vs Frequency RGATE = 10 Ohm, Vcc = 15V with IRFPE50
12
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IR2010(S) & (PbF)
150.00 125.00 Ju ncti n Tem perature (C ) o
150.00 125.00 Ju ncti n T em perature (C ) o
200V
100.00 75.00 50.00 25.00 0.00
1.E + 03 1.E + 04 1.E + 05 1.E + 06
100V 10V
100.00 75.00 50.00 25.00 0.00
1.E + 03 1.E + 04 1.E + 05
200V 100V 10V
1.E + 06
Frequ ency (H z)
Frequ ency (H z)
Figure 29. IR2010 Tj vs Frequency RGATE = 16 Ohm, Vcc = 15V with IRFBC40
Figure 30. IR2010 Tj vs Frequency RGATE = 22 Ohm, Vcc = 15V with IRFBC30
200V
150.00 125.00 Ju ncti Tem perature (C ) on 100.00 75.00
1 5 0 .0 0 1 2 5 .0 0 200V 100V 10V
Ju ncti Tem perature (C ) on
100V
10V 1 0 0 .0 0 7 5 .0 0 5 0 .0 0 2 5 .0 0 0 .0 0
50.00 25.00 0.00
1.E + 03 1.E + 04 1.E + 05 1.E + 06
1.E + 03
1.E + 04
1.E + 05
1.E + 06
Frequ ency (H z)
Freq uen cy (H z)
Figure 31. IR2010 Tj vs Frequency RGATE = 33 Ohm, Vcc = 15V with IRFBC20
Figure 32. IR2010S Tj vs Frequency RGATE = 10 Ohm, Vcc = 15V with IRFPE50
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13
IR2010(S) & (PbF)
1 5 0 .0 0 1 2 5 .0 0
Junction Temperature (C)
150.00 200V 125.00
Junction Temperature (C)
200V 100V 10V
100V
1 0 0 .0 0 7 5 .0 0 5 0 .0 0 2 5 .0 0 0 .0 0
1.E + 03 1.E + 04 1.E + 05 1.E + 06
10V
100.00 75.00 50.00 25.00 0.00
1.E + 03 1.E + 04 1.E + 05
Frequency (Hz)
1.E + 06
Frequency (Hz)
Figure 33. IR2010S Tj vs Frequency RGATE = 16 Ohm, Vcc = 15V with IRFBC40
Figure 34. IR2010S Tj vs Frequency RGATE = 22 Ohm, Vcc = 15V with IRFBC30
150.00 125.00
Junction Temperature (C)
200V
100.00 75.00 50.00 25.00 0.00
1.E + 03 1.E + 04
Frequency (Hz)
100V 10V
1.E + 05
1.E + 06
Figure 35. IR2010S Tj vs Frequency RGATE = 33 Ohm, Vcc = 15V with IRFBC20
14
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IR2010(S) & (PbF)
Case Outlines
14 Lead PDIP
01-6010 01-3002 03 (MS-001AC)
16 Lead SOIC (wide body)
01 6012 01-3014 03 (MS-013AA)
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15
IR2010(S) & (PbF)
LEADFREE PART MARKING INFORMATION
Part number
IRxxxxxx YWW? ?XXXX
Lot Code (Prod mode - 4 digit SPN code) IR logo
Date code
Pin 1 Identifier ? P MARKING CODE Lead Free Released Non-Lead Free Released
Assembly site code Per SCOP 200-002
ORDER INFORMATION
Basic Part (Non-Lead Free) 14-Lead PDIP IR2010 order IR2010 16-Lead SOIC IR2010S order IR2010S Leadfree Part 14-Lead PDIP IR2010 order IR2010PbF 16-Lead SOIC IR2010S order IR2010SPbF
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105 This product has been qualified per industrial level Data and specifications subject to change without notice. 9/12/2004
16
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